Proceedings, the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, November 13-15, 1995, Lafayette, Louisiana

• Author(s): IEEE Computer Society,
• Publisher: IEEE Computer Society Press
• Pages: 305
• ISBN_10: 0818671076
  ISBN_13: 9780818671074
  
• Language: en
• Categories: Computers / Artificial Intelligence / General , Computers / Software Development & Engineering / Systems Analysis & Design , Technology & Engineering / Electronics / General ,

Description:... An invited talk recounts Intel's experience with increasing die yield through CAD algorithms, and a panel discussion examines tools for the extracting of critical areas for a yield analysis of VLSI design. Others of the 34 papers cover critical area analysis, defect sensitivity and reliability, fault tolerant architectures and arrays, yield projection and enhancement, fault tolerant and testing techniques, and self-checking and coding techniques. No subject index. Annotation copyright by Book News, Inc., Portland, OR.